DFT Engineer

Job Description
QuickLogic, founded in 1988, is a fabless semiconductor company designing Customer Specific Standard Products, or CSSPs. CSSPs are complete, customer-specific solutions that include a combination of silicon solution platforms, Proven System Blocks (PSBs,) customer-specific logic, software drivers and firmware. CSSPs extend battery life, improve the viewability of images on mobile displays and add differentiated features to handheld mobile devices.

QuickLogic supplies leading-edge, low-power customizable semiconductor sub-system solutions for tablets, smartphones, broadband data cards, secure access data cards and mobile enterprise products. These solutions include storage, video imaging, wireless networks, USB connectivity and security.

Senior DFT (Design for Test) Engineer will be a key team member responsible for defining, developing and sustaining test methodology for QuickLogic’s SoC (System on Chip), which consist of both custom and ASIC design flow. This critical role is expected to review and enhance current methodology in improving product’s cost margin, quality, and manufacturing flow. Strong IC test backgrounds with design experience are a must. Experience in COT environment and ability to collaborate with multiple engineering disciplines at different geographical location worldwide are essential in the success of this position.

Key result areas for this position are:

?Partner with Design Engineering in defining effective test methodology for all QuickLogic new products during product definition
?Analyze, quantify, and enhancing new product test coverage meets requirement during product development in the most cost effective manner
?Develop, debug, and improve efficiency on structural and functional test patterns for ATE (JTAG, ATPG, Targeted Functional, Speed/Power)
?Develop test related documentation for new products
?Efficient test vector bring up for new products through proper planning and preparation
?Evaluate and improve efficiency new and existing ATE test program
?Assisting and supporting ATE test program development, including knowledge transfer
?Develop/collaborate plans for product validation, verification, and characterization
?Provide technical assistance in identifying and resolving customer problems, developing new tests, and improving efficiency and effectiveness of existing tests

Key Activities/Tasks for these positions are:

?Implementer of agreed requirement of design for test methodology during initial phase of design activities
?Collaborate with Product/Test, Design, and EDA S/W team in test vector generation and knowledge transfer of new product test methodology
?Pre-tapeout verification of all test vectors in simulation environment
?Develop/collaborate plans for silicon validation and characterization to ensure all features are verified
?Develop and maintain test specifications for test methodology, including all DC and AC test
?Test flow development to quantify fault and overall test coverage of new and current products
?Active participant in initial test vector bring up
?Test program optimization to minimize test time and assist in identifying and resolving test related activities
?Analyze new DFT tools and set up environment to implement test methodology


?BS/MS in Electronics Engineering with 9-10 years of experience in DFT (Design For Test)
?DFT concepts and implementation of ATPG, scan, BIST, MEMBIST, and JTAG through available tools
?Verilog behavioral, RTL, and gate level coding with digital simulators (NCSIM, Questa…etc)
?Formal verification
?Familiarity and working knowledge of product ATE test program
?Experience in custom design test methodology, preferably programmable logic devices (PLD or FPGA). 5+ years of experience with transistor level design
?Firm understanding of cost structure of product
?Knowledge of scripting language is a must (PERL, TCL…etc)
?Excellent communication skills, both in written and verbal form
?Prior experience working with multi-site, multi-cultural teams

Additional Information

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QuickLogic Corporation

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